In recent years, mobile communication systems such as portable telephone systems have been in widespread use as multifunctional inexpensive communication systems because of the advanced semiconductor technology and mobile communication technology. Multiplexing schemes that have heretofore been available for mobile communication systems, typically portable telephone systems, include frequency division multiple access (FDMA) and time division multiple access (TDMA) schemes. Recently, there has been put to use a CDMA mobile communication system, which is capable of multiplexing more channels in the same frequency range than the above multiplexing schemes, as a next-generation mobile communication technology.
According to the CDMA mobile communication system, a transmission signal is spread at the transmission side into a wide frequency range using an inherent spreading code that is allotted to the signal, and a reception signal is despread (demodulated) using the same spreading code at the reception side. As a result, it is possible to mix a plurality of channels spread by respective inherent spreading codes from a plurality of users in one frequency band.
In a mobile communication system, a transmission signal from the transmission side is generally subject to multipath fading in its propagation. Specifically, a reception side receives a combination of waves propagating over different paths and received at different time instants, i.e., direct and reflected waves propagating through different paths. The effect of such multipath fading needs to be removed in order to improve the reception quality. A path search device in a base station apparatus of a mobile communication system interpolates a reception signal to increase the accuracy of path detection to detect a received wave over a certain path for thereby efficiently removing the effect of multipath fading.
For example, a path search device in a base station apparatus of a CDMA mobile communication system is constituted as a searcher of the base station apparatus. The searcher interpolates the reception signal to reduce chip intervals of the reception signal to detect a reception time instant at which a signal is to be received. The base station apparatus also has fingers associated with the searchers for extracting certain paths from the reception signal based on the reception time instant detected by the searchers and performing RAKE combining.
FIG. 1 schematically shows an arrangement of a conventional base station apparatus in a CDMA mobile communication system. Here, only the reception function portion of the base station apparatus is illustrated.
Base station apparatus 10 comprises antenna 11 for receiving a transmission signal that has been spread according to CDMA scheme from a mobile terminal on a transmission side, not shown, receiver 12 having an interface function for a signal received by antenna 11 and demodulating the reception signal, parameter manager 13 for allotting spreading codes to respective communication channels (CHs) and managing the spreading codes, N searchers 141 to 14N and N fingers 151 to 15N for being allotted to the respective communication channels by parameter manager 13, and reception processor 16 for performing a predetermined reception process on the reception signal over certain paths extracted by fingers 151 to 15N. Searchers 141 to 14N and fingers 151 to 15N are associated with each other in one-to-one correspondence. N searchers 141 to 14N are structurally identical to each other, and N fingers 151 to 15N are also structurally identical to each other. First searcher 141 interpolates reception signal received by receiver 12 to detect a certain reception time instant, and indicates the detected reception time instant to first finger 151 that is associated with first searcher 141. First finger 151 extracts a certain path representing the reception time instant indicated by first searcher 141 from the reception signal received by receiver 12, and despreads the signal propagated over the path. Thereafter, first finger 151 performs RAKE combining on signals of a plurality of paths for which reception time instants are similarly indicated, and outputs the combined signal to reception processor 16. Other searchers 142 to 14N also operate in the same manner as with first searcher 141.
In the mobile communication system including the base station apparatus with the above-described configuration, a non-illustrated mobile terminal on the transmission side sends a framed transmission signal having a plurality of time slots. To each of the time slots, there is added a pilot signal at its leading position which represents a fixed pattern known to both transmission and reception sides. The pilot signal is subjected to quadrature modulation together with the transmission data. After the quadrature modulation, the pilot signal and the transmission data are spectrum-spread using an inherent spread code for the communication channel. The transmission signal thus spread using respective inherent spreading codes in the CDMA system are received by antenna 11 of the base station apparatus. Receiver 12 performs signal interface conversion such as amplification and quadrature demodulation, e.g., multiplies a reception signal received by antenna 11 by a reference frequency which is generated by a reference frequency generator, not shown, with a multiplier, not shown, thereby converting the reception signal into a baseband signal.
Parameter manager 13 is arranged to allot a finger and a searcher to each of communication channels included in the reception signal. For example, parameter manager 13 allots unused fingers and searchers, successively from first finger 151 and first searcher 141 to respective communication channels. Then, parameter manager 13 indicates code generating information for generating corresponding spreading codes to the allotted fingers and searchers, which generate spreading codes that are associated with the code generating information indicated thereto.
Demodulated signal that is demodulated in receiver 12 is supplied to the searchers and fingers that have been allotted by parameter manager 13.
Each searcher interpolates sampling points in order to reduce chip intervals of the reception signal, and generates a delay profile based on the pilot signals added to the leading positions of the time slots of the interpolated signal. In the delay profile, the power values of reception signal components which are orthogonal to each other that are demodulated by receiver 12 are calculated for respective delay times in order to indicate a temporal change of reception time instants of the demodulated signal due to multipath fading. Usually, the power values calculated for the respective delay times on the delay profile represent peaks on a plurality of different propagating paths due to the effect of the multipath fading. Each searcher then detects peaks in excess of a predetermined threshold, and indicates delay times corresponding to the detected peaks to the finger associated therewith. The finger thus notified then extracts path of the received wave corresponding to the indicated delay time from the demodulated signal produced by receiver 12. The extracted paths are then RAKE-combined and then processed by reception processor 16.
Since the accuracy with which to detect paths depends upon the searchers, the searchers determine the reception quality of the base station apparatus. The arrangement of searchers will be described below. Because searchers 141 to 14N are structurally identical to each other, the arrangement of first searcher 141 will be described. FIG. 2 shows the arrangement of first searcher 141.
First searcher 141 comprises first interpolating filter 20 for interpolating sampling points of the demodulated signal from receiver 12 to reduce chip intervals thereof, correlation value calculator 21 for calculating a correlation value of data interpolated by first interpolating filter 20, in-phase adder 22 and power adder 23 for generating a delay profile based on the calculated correlation value, second interpolating filter 24 for further reducing chip intervals of the generated delay profile, path controller 25 for indicating paths to be extracted to a corresponding finger, and code generator 26 for generating a spreading code for the calculation of the correlation value.
The interpolating filters will be described below. FIG. 3 shows a structure of first interpolating filter 20. It is assumed that the oversampling number is “2” and the tap length is “4”. First interpolating filter 20 has first to seventh delay elements 271 to 277, first to eighth multipliers 281 to 288, and adder 29. First to seventh delay elements 271 to 277 are connected in series with each other. Input signals applied to first to seventh delay elements 271 to 277 and an output signal from seventh delay element 277 are supplied respectively to first to eighth multipliers 281 to 288. To first to eighth multipliers 281 to 288, there are applied respective predetermined filter coefficients C-4, C-3, C-2, C-1, C1, C2, C3, C4, which are multiplied by the input signals applied to respective delay elements and the output signal from seventh delay element 277. Assuming i=1 to 4, the filter coefficients C-i and Ci are equal to each other. Products produced by respective multipliers 281–288 are added to each other by adder 29, which is then supplied as output signal 31 of interpolating filter 20 to the outside.
First interpolating filter 20 thus constructed can determine an interpolation point using values of the input signal at four points before and after input signal 30. As input signal 30 are more delayed, the input signal is shifted and interpolating points are successively determined. The interpolated serial interpolating data are supplied as output signal 31 to correlation value calculator 21 (FIG. 2).
Referring back to FIG. 2, based on the code generating information corresponding to the communication channel allotted from the parameter manager to first searcher 141, code generator 26 generates a spreading code corresponding to the communication channel. Correlation value calculator 21 detects the pilot signals added to the leading positions of respective time slots from the interpolation data interpolated by first interpolating filter 20 shown in FIG. 3, and generates ideal reception signals by spreading pre-recognized pilot signals with the spreading code generated by code generator 26. Correlation value calculator 21 then multiplies the detected pilot signals and the generated ideal reception signals to calculate correlation values thereby performing quadrature demodulation on the pilot signals. As a result of the quadrature demodulation, the pilot signals are outputted as I (In-Phase) signals and Q (Quadrature-Phase) signals which are orthogonal to each other. In-phase adder 22 performs a certain number of in-phase additions “I+I”, and “Q+Q” on the I signal component and the Q signal component from correlation value calculator 21.
Power adder 23 performs a certain number of power additions “I2+Q2” on the output from in-phase adder 22. Second interpolating filter 24, which is of the same structure as first interpolating filter 20, interpolates added power data in order to further reduce chip intervals. Path controller 25 refers to a delay profile in which reception signals interpolated and expressed as power values by second interpolating filter 24 are arranged with respect to respective delay times, detects peaks in excess of a predetermined threshold value, and indicates delay times corresponding to the detected peaks to first finger 151.
First searcher 141 thus arranged has a central processing unit (CPU), not shown, which can execute various control processes based on a control program stored in a given storage device such as a read-only memory (ROM) or the like.
FIG. 4 shows the content of the processing of the control program which is stored in such a given storage device. In first searcher 141, modulated signals from receiver 12 are interpolated at “½” chip intervals, for example, in first interpolating filter 20 as step S33. To do so, the oversampling number in the interpolating filter of the constitution shown in FIG. 3 may be set to “2”. Then, in step S44, respective correlation values are calculated in correlation value calculator 21 for pilot signals which are of predetermined fixed patterns added to the leading positions of time slots, of the I and Q signals that have been interpolated at the “½” chip intervals. Because the pilot signals are of predetermined fixed patterns, it is possible to accurately determine ideal waveforms at the reception side. In correlation value calculator 21 calculates, correlation values with respect to ideal reception signals produced by spreading pre-recognized pilot signals with spreading codes generated by code generator 26 are calculated in the respective time slots of a received frame. A higher correlation value represents that the waveform of the pilot signal at the leading position of each time slot is closer to an ideal waveform, indicating a better reception sensitivity.
The calculated correlation values are added a given number of times N for I and Q signal components by in-phase adder 22, thus removing noise components contained in the I and Q signals, in step S35. The greater the number of in-phase additions, the smaller the noise components of the I and Q signal components.
The result of the in-phase additions is then added for power a given number of times M by the power adder 23 in step S36. The power values are thus averaged with respect to time, preventing paths from being detected with wrong power values due to instantaneous noise.
The values of in-phase additions are further interpolated at “¼” chip intervals, for example, by second interpolating filter 24 in step S37. As described above, second interpolating filter 24 is of a structure similar to first interpolating filter 20.
The calculated power values represent a delay profile on a temporal axis which indicates reception signals that are converted into power values for respective delay times. Path controller 25 detects peaks in excess of a predetermined threshold, of the power values for respective delay times. Path controller 25 then indicates the delay times corresponding to the peaks in excess of the threshold to first finger 151 in step S38.
As described above, each of the searchers including first finger 151 performs an interpolation process to increase the number of sampling points for increasing the accuracy of a subsequent process in order to achieve a higher accuracy for path detection.
In the conventional path searching apparatus described above, the accuracy for path detection is increased by the interpolation by first and second interpolating filters 20, 24 in steps S33, S37. The number of interpolating operations is greater if they are performed before correlation values are calculated and in-phase additions are made than if they are performed before correlation values are calculated and after power additions are performed in searchers 141 to 14N as in steps S33, S37, resulting in an increased accuracy for path detection. Presently, however, because of a limitation posed on the calculation amount allowed by the searchers, interpolating operations are performed before correlation values are calculated and after power additions are made as in steps S33, S37. The number of interpolating operations increases and the amount of subsequent processing increases due to the interpolating operations also increases. As a result, there is a trade-off between the accuracy for path detection and the amount of processing.
The calculation processing in searchers 141 to 14N varies with time depending on the number of communication channels to be processed. Heretofore, however, interpolating operations have fixedly been performed before correlation values are calculated and after power additions are performed, irrespective of the number of communication channels to be processed. Specifically, if the number of communication channels to be processed by the searchers is small, there is a situation where an extra amount of calculation is available for performing interpolating operations before correlation values are calculated and in-phase additions are made. Heretofore, since interpolating operations are performed in a fixed sequence, the number of interpolating operations is small, making it impossible to increase the accuracy for path detection.
Japanese laid-open patent publication No. Hei 10-190522 (JP, A, 10190522) discloses a technique with respect to a path searching apparatus for using a matched filter to select signals, greater than a predetermined threshold, of all multipath signals in a multipath search range and perform a RAKE combining on the selected signals for thereby combining all multipaths, and excluding the RAKE combining in chip phases where the signal level is low according to a threshold judgment using an average delay profile. According to the disclosed technique, it is also necessary to carry out processing operations in the range of all searched paths at all times regardless of the number of communication channels to be processed. The disclosed path searching apparatus is usually optimized to maintain a certain level of accuracy in a maximum allowable range. However, it is desirable for the path searching apparatus to have as good an accuracy for path detection as possible if the number of communication channels is small and an extra amount of calculation is available.